View HD74HC323_4251959.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HD74HC323
8-bit Universal Shift/Storage Register (with 3-state Outputs)
REJ03D0610-0200 (Previous ADE-205-489) Rev.2.00 Jan 31, 2006
Description
This eight-bit universal register features multiplexed I/O ports to achieve full eight bit data handling in a single 20-pin package. HD74HC323 applications are as stacked or push-down registers, buffer storage, and accumulator registers. Two function-select inputs and two output control inputs can be used to choose the modes of operation listed in the function table. Synchronous parallel loading is accomplished by taking both function-select lines S0 and S1 high. This places the threestate outputs in a high-impedance state, which permits data that is applied on the I/O ports to be clocked into the register. Reading out of this register can be accomplished while the outputs are enabled in any mode. The clear function is synchronous, and a low level at the clear input clears the register on the next low-to-high transition of the clock.
Features
* * * * * * High Speed Operation: tpd (Clock to Q) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HC323RPEL Package Type SOP-20 pin (JEDEC) Package Code (Previous Code) PRSP0020DC-A (FP-20DBV) Package Abbreviation RP Taping Abbreviation (Quantity) EL (1,000 pcs/reel)
Function Table
Inputs Mode Clear L L Hold Shift Right Shift Left Load H H H H H H H Function Select S1 Clear X L L X L L H H H S0 L X L X H H L L H Output Control G1 L L L L L L L L X G2 L L L L L L L L X X L Clock Serial SL X X X X X X H L X SR X X X X H L X X X A/QA L L QA0 QA0 H L QBn QBn a B/QB L L QB0 QB0 QAn QAn QCn QCn b C/QC L L QC0 QC0 QBn QBn QDn QDn c Inputs/Outputs D/QD L L QD0 QD0 QCn QCn QEn QEn d E/QE L L QE0 QE0 QDn QDn QFn QFn e F/QF L L QF0 QF0 QEn QEn QGn QGn f G/QG H/QH L L QG0 QG0 QFn QFn QHn QHn g L L QH0 QH0 QGn QGn H L h Outputs QA' L L QA0 QA0 H L QBn QBn a QH' L L QH0 QH0 QGn QGn H L h
a ... h = the level of the steady-state input at A through H, respectively. These data are loaded into the flip-flops while the flip-flop outputs are isolated from the input/output terminals.
Rev.2.00 Jan 31, 2006 page 1 of 5
HD74HC323
Pin Arrangement
S0 Output controls G1 G2 G/QC E/QE C/QC A/QA QA' Clear 1 2
G S0 S1 SL G/QC E/QE C/QC A/QA QA Clear SR QH H/QH F/QF D/QD B/QB CK
20 VCC 19 S1 18 Shift left SL
3 4 5 6 7 8 9
17 QH' 16 H/QH 15 F/QF 14 D/QD 13 B/QB 12 Clock 11 Shift right SR
GND 10 (Top view)
Logic Diagram
QH' SL
H/QH
G/QG
F/QF
E/QE
D/QD
C/QC
B/QB
CK CK CK CK CK CK
CK CK CK CK
A/QA
SR S0
S1 Clear
Clock
QA' G1 G2
Rev.2.00 Jan 31, 2006 page 2 of 5
HD74HC323
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 35 75 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Note: Symbol VCC VIN, VOUT Ta tr, tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400 1. This item guarantees maximum limit when one input switches. Unit V V C ns Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
Electrical Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 4.5 6.0 6.0 6.0 6.0 Ta = 25C Min Typ Max 1.5 -- -- 3.15 -- -- 4.2 -- -- -- -- 0.5 -- -- 1.35 -- -- 1.8 1.9 2.0 -- 4.4 4.5 -- 5.9 6.0 -- 4.18 -- -- 5.68 -- -- 4.18 -- -- 5.68 -- -- -- 0.0 0.1 -- 0.0 0.1 -- 0.0 0.1 -- -- 0.26 -- -- -- -- -- -- -- -- -- -- -- -- 0.26 0.26 0.26 0.5 0.1 4.0 Ta = -40 to+85C Unit Test Conditions Min Max 1.5 -- V 3.15 -- 4.2 -- -- 0.5 V -- 1.35 -- 1.8 1.9 -- V Vin = VIH or VIL IOH = -20 A 4.4 -- 5.9 -- 4.13 -- QA to QH IOH = -6 mA 5.63 -- IOH = -7.8 mA 4.13 -- QA', QH' IOH = -4 mA 5.63 -- IOH = -5.2 mA -- 0.1 V Vin = VIH or VIL IOL = 20 A -- 0.1 -- 0.1 -- 0.33 IOL = 6 mA QA to QH IOL = 7.8 mA -- 0.33 QA', QH' -- 0.33 IOL = 4 mA -- 0.33 IOL = 5.2 mA -- 5.0 A Vin = VIH or VIL, Vout = VCC or GND -- 1.0 A Vin = VCC or GND -- 40 A Vin = VCC or GND, Iout = 0 A
VIL
Output voltage
VOH
VOL
Off-state output current Input current Quiescent supply current
IOZ Iin ICC
Rev.2.00 Jan 31, 2006 page 3 of 5
HD74HC323
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Maximum clock frequency Propagation delay time Symbol VCC (V) fmax 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 -- Ta = 25C Ta = -40 to +85C Unit Test Conditions Min Typ Max Min Max -- -- 5 -- 4 MHz -- -- 27 -- 21 -- -- 31 -- 24 -- -- 150 -- 190 ns Clock to QA' or QH' -- 18 30 -- 38 -- -- 26 -- 33 -- -- 175 -- 220 ns Clock to Q -- 20 35 -- 44 -- -- 30 -- 37 ns -- -- 150 -- 190 -- 14 30 -- 38 -- -- 26 -- 33 -- -- -- -- -- -- -- -- -- -- -- 15 -- -- 5 -- -- 4 -- 5 150 30 26 75 15 13 60 12 10 10 -- -- -- -- -- -- -- -- -- -- 190 38 33 95 19 16 75 15 13 10 ns
tPLH tPHL
Output enable time
tZH tZL tHZ tLZ tTLH tTHL
Output disable time Output rise/fall time
ns
QA', QH'
ns
Q
Input capacitance
Cin
pF
Test Circuit
VCC G1 Input
See Function Table
VCC Output G G2 S1 S0 SR Clock SL Clear QH' CL = 50 pF QA' Output CL = 50 pF A/QA to H/QH Output 1 k CL = 50 pF TEST t PLH / t PHL t ZH/ t HZ t ZL / t LZ S1 OPEN GND VCC S1 OPEN GND VCC
Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Jan 31, 2006 page 4 of 5
HD74HC323
Package Dimensions
JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A Previous Code FP-20DBV MASS[Typ.] 0.52g
*1
D
F 11 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET.
20
bp
*2
HE
E
Index mark
Reference Symbol
c
Dimension in Millimeters Min Nom 12.80 7.50 Max 13.2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
D E A2
10 bp x M L1
A1 A bp b1 c c
1
0.10
0.20
0.30 2.65
0.34
0.40
0.46
0.20
0.25
0.30
A
HE
0 10.00 10.40 1.27
8 10.65
A1
y L
e x y Z
0.12 0.15 0.935 0.40
1
Detail F
L L
0.70 1.45
1.27
Rev.2.00 Jan 31, 2006 page 5 of 5
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 205, AZIA Center, No.133 Yincheng Rd (n), Pudong District, Shanghai 200120, China Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
http://www.renesas.com
Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510
(c) 2006. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .5.0

▲Up To Search▲

Price & Availability of HD74HC323

	To Download HD74HC323 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .